The invention relates generally to integrated circuits and more specifically to an integrated circuit capacitor having a barrier layer that forms at least a portion of at least one of the capacitor electrodes, and to an improved barrier layer.
To increase storage density (the ratio of storage capacity to die size) and data-access speed, dynamic-random-access-memory (DRAM) manufacturers continue to reduce the geometries of and otherwise improve the structures and components that compose a DRAM circuit. One such component is the capacitor that is used as the storage element of a DRAM cell and one such structure is a diffusion barrier layer. Another such component is an antifuse, which often has a structure that is similar or identical to that of a capacitor.
Unfortunately, leakage and depletion often prevent DRAM manufacturers from shrinking the size of a DRAM-cell capacitor from its present size. Generally, leakage denotes the discharge current that flows through the capacitor dielectric when the capacitor is open-circuited, and thus is a measure of how fast the charge on a capacitor will leak away. In a capacitor with semiconductor electrodes, e.g., polysilicon, depletion denotes the affect of the depletion regions that form within these electrodes when the capacitor stores a charge. As the amount of leakage or depletion increases, the capacitor""s storage capacity decreases. But unfortunately, the storage capacity of a DRAM capacitor can be reduced only so much before the DRAM cell can no longer hold its state between refresh cycles, and thus can no longer store data reliably. Therefore, because the storage capacity of a capacitor is proportional to the area of the capacitor plates, the area, and thus the overall size, of a DRAM capacitor often must be relatively large to compensate for the storage-capacity-robbing affects of leakage and depletion. That is, the DRAM capacitor often must be larger than it would have to be if leakage or depletion were reduced or eliminated.
Furthermore, conventional electrode material, such as polysilicon, often causes the access speed of a DRAM cell to be relatively slow. Often, the resistance of an electrode formed from such a material is relatively high. Therefore, because this resistance is effectively in series with the DRAM capacitor, it causes the time constant for charging/discharging the capacitor to be relatively large, and thus causes the DRAM cell to have a relatively long read/write time.
Additionally, conventional barrier materials often prevent manufacturers from reducing the dimensions of a structure disposed in a barrier layer. A barrier layer is often used to prevent the dopant in one layer from diffusing into an adjacent layer during circuit processing. A popular barrier material is tungsten silicide. But unfortunately, tungsten silicide crystallizes at about 800xc2x0 C. and forms relatively large grains. This crystallization degrades tungsten silicide""s barrier properties by orders of magnitude because dopants can easily diffuse along the grain boundaries. The large grains also prevent the use of tungsten silicide with relatively narrow structures such as wordlines. That is, if the structure""s width is about the same as or is less than the grain size, tungsten silicide often cannot be used. Furthermore, although it can sometimes be used as such a barrier layer, titanium nitride oxidizes easily, and thus is unsuitable for use in many applications.
Moreover, conventional electrode materials may cause a circuit coupled to an antifuse to have a relatively slow access speed. An antifuse has a structure similar to that of a capacitor, but is typically used as a one-time programmable, nonvolatile storage element. For example, an antifuse can be xe2x80x9cblownxe2x80x9d into a short-circuited state by applying a programming voltage that is high enough to break down the dielectric such that the electrodes contact each other through the dielectric. Unfortunately, the relatively high resistance of conventional electrode materials may cause a blown antifuse to have a relatively high resistance. Because the circuit coupled to the antifuse often has a parasitic capacitance associated therewith, the relatively large time constant of the coupled antifuse electrodes and parasitic capacitance can cause the circuit to have a relatively slow access speed.
In accordance with one aspect of the invention, a semiconductor structure includes a dielectric layer having first and second opposing sides, a conductive layer that is adjacent to the first side of the dielectric layer, and a conductive barrier layer that is adjacent to the second side of the dielectric layer. A first terminal of the semiconductor structure is coupled to the conductive layer and a second terminal of the semiconductor structure is coupled to the barrier layer.
When used as a capacitor, such a structure exhibits reduced leakage, depletion, thickness, and resistance as compared with a conventional capacitor, and thus can be made significantly smaller than a conventional capacitor. Furthermore, such a capacitor exhibits a reduced time constant as compared with a conventional capacitor. Thus, when used in a DRAM cell, such a capacitor can increase the access speed of the DRAM cell as compared with a conventional cell. Moreover, when used as an antifuse, such a structure can increase the access speed of a circuit coupled thereto as compared with a conventional antifuse.